Pattern transfer of directed self-assembly (DSA) patterns for CMOS device applications
- Hsin-Yu Tsai
- Hiroyuki Miyazoe
- et al.
- 2013
- SPIE Advanced Lithography 2013
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76 results for Eric A. Joseph
Large-scale (512kbit) integration of multilayer-ready access-devices based on Mixed-Ionic-Electronic-Conduction (MIEC) at 100% yield
- G.W. Burr
- K. Virwani
- et al.
- 2012
- VLSI Technology 2012
Optimization of programming current on endurance of phase change memory
- Sangbum Kim
- Pei-Ying Du
- et al.
- 2012
- VLSI-TSA 2012
A 0.021 μm2 trigate SRAM cell with aggressively scaled gate and contact pitch
- Michael A. Guillorn
- Josephine Chang
- et al.
- 2011
- VLSI Technology 2011
A method to maintain phase-change memory pre-coding data retention after high temperature solder bonding process in embedded systems
- H.L. Lung
- Matthew Breitwisch
- et al.
- 2011
- VLSI Technology 2011
Endurance and scaling trends of novel access-devices for multi-layer crosspoint-memory based on mixed-ionic-electronic-conduction (MIEC) materials
- R.S. Shenoy
- K. Gopalakrishnan
- et al.
- 2011
- VLSI Technology 2011
Metallization opportunities and challenges for future back-end-of-the-line technology
- Cyril Cabral Jr.
- Benjamin Fletcher
- et al.
- 2010
- ADMETA 2010
Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm
- Sarunya Bangsaruntip
- A. Majumdar
- et al.
- 2010
- VLSI Technology 2010
Fabrication of dual damascene BEOL structures using a multi-level multiple exposure (MLME) scheme - Part 2. RIE-based pattern transfer and completion of dual damascene process yielding an electrically functional via chain
- Stefan Harrer
- John C Arnold
- et al.
- 2010
- Proceedings of SPIE - The International Society for Optical Engineering 2010
Fabrication of dual damascene BEOL structures using a Multi-Level Multiple Exposure (MLME) scheme - Part 1. Lithographic patterning
- Dario L. Goldfarb
- Stefan Harrer
- et al.
- 2010
- Proceedings of SPIE - The International Society for Optical Engineering 2010