Vertical channel devices enabled by through silicon via (TSV) technologies
- C. Kothandaraman
- Sami Rosenblatt
- et al.
- 2016
- IEDM 2016
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19 results for William Landers
3D copper TSV integration, testing and reliability
- Mukta Farooq
- T. Graves-Abe
- et al.
- 2011
- IEDM 2011
A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Hamiltonian Engineering with Multicolor Drives for Fast Entangling Gates and Quantum Crosstalk Cancellation
- K.X. Wei
- Easwar Magesan
- et al.
- 2022
- Physical Review Letters
High-performance superconducting quantum processors via laser annealing of transmon qubits
- Eric J. Zhang
- Srikanth Srinivasan
- et al.
- 2022
- Science Advances
Impact of 3D copper TSV integration on 32SOI FEOL and BEOL reliability
- Mukta Farooq
- Giuseppe La Rosa
- et al.
- 2015
- IRPS 2015
Copper through silicon via (TSV) for 3D integration
- C. Kothandaraman
- B. Himmel
- et al.
- 2012
- IRPS 2012
A porous SiCOH dielectric with k=2.4 for high performance BEOL interconnects
- S. Gates
- A. Grill
- et al.
- 2006
- ADMETA 2006
Electrical and reliability evaluation of Cu/Low-k integration: Exploration of PVD barrier/seed and CVD SiC(N,H) cap depositions
- C.-C. Yang
- D. Edelstein
- et al.
- 2004
- ADMETA 2004