Strained Si channel MOSFETs with embedded silicon carbon formed by solid phase epitaxy
- Yaocheng Liu
- Oleg Gluschenkov
- et al.
- 2007
- VLSI Technology 2007
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18 results for Jinghong Li
A 45nm low cost low power platform by using integrated dual-stress-liner technology
- J. Yuan
- S.S. Tan
- et al.
- 2006
- VLSI Technology 2006
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates
- Qiqing Ouyang
- Min Yang
- et al.
- 2005
- VLSI Technology 2005
Retardation of arsenic diffusion in silicon-germanium by co-implantation
- Omer Dokumaci
- Paul Ronsheim
- et al.
- 2004
- ECS Meeting 2004
Sub-30 NM abrupt junction formation in strained silicon/silicon-germanium CMOS device
- K.-L. Lee
- F. Cardone
- et al.
- 2004
- ECS Meeting 2004
Formation of Si:CP layer through in-situ doping and implantation process for n-type metal-oxide-semiconductor devices
- Shogo Mochizuki
- Rainer Loesing
- et al.
- 2014
- Thin Solid Films
Strain mapping of Si devices with stress memorization processing
- Y.Y. Wang
- John Bruley
- et al.
- 2013
- Applied Physics Letters
Variable magnification dual lens electron holography for semiconductor junction profiling and strain mapping
- Y.Y. Wang
- J. Li
- et al.
- 2013
- Ultramicroscopy