Hardware-assisted 3D TCAD for predictive capacitance extraction in 32nm SOI SRAMs
- Ajay N. Bhoj
- Rajiv Joshi
- et al.
- 2011
- IEDM 2011
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7 results for Niraj K. Jha
SECRET: Semantically Enhanced Classification of Real-World Tasks
- Ayten Ozge Akmandor
- Jorge Ortiz
- et al.
- 2021
- IEEE TC
TCAD structure synthesis and capacitance extraction of a voltage-controlled oscillator using automated layout-to-device synthesis methodology
- Debajit Bhattacharya
- Rajiv V. Joshi
- et al.
- 2014
- CICC 2014
On the design of robust multiple fault testable CMOS combinational logic circuits
- Sandip Kundu
- Sudhakar M. Reddy
- et al.
- 1987
- ICCAD 1987
3-D-TCAD-based parasitic capacitance extraction for emerging multigate devices and circuits
- Ajay N. Bhoj
- Rajiv V. Joshi
- et al.
- 2013
- IEEE Transactions on VLSI Systems
Efficient methodologies for 3-D TCAD modeling of emerging devices and circuits
- Ajay N. Bhoj
- Rajiv V. Joshi
- et al.
- 2013
- IEEE TCADIS
Design of Robustly Testable Combinational Logic Circuits
- Sandip Kundu
- Sudhakar M. Reddy
- et al.
- 1991
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems