A 500MHz random cycle 1.5ns-latency, SOI embedded DRAM macro featuring a 3T micro sense amplifier
- John Barth
- William Reohr
- et al.
- 2007
- ISSCC 2007
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13 results for Hillery C. Hunter
A new look at exploiting data parallelism in embedded systems
- Hillery C. Hunter
- Jaime H. Moreno
- 2003
- CASES 2003
An innovative low-power high-performance programmable signal processor for digital communications
- Jaime H. Moreno
- Victor Zyuban
- et al.
- 2003
- IBM J. Res. Dev