SOI at IBM: Current status of technology, modeling, design, and the outlook for the 0.1 μm generation
- F. Assaderaghi
- G. Shahidi
- 2000
- IEEE International SOI Conference 2000
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105 results for Ghavam Shahidi
Silicon-on-insulator dynamic threshold ESD networks and active clamp circuitry
- S. Voldman
- D. Hui
- et al.
- 2000
- EOS/ESD 2000
Partially depleted silicon-on-insulator (SOI): A device design/modeling and circuit perspective
- F. Assaderaghi
- G. Shahidi
- et al.
- 2000
- ICM 2000
Design of a high performance PD SOI for the 0.18 μm technology generation
- M. Sherony
- S.-H. Lo
- et al.
- 2000
- ICM 2000
Electrostatic discharge (ESD) protection in silicon-on-insulator (SOI) CMOS technology with aluminum and copper interconnects in advanced microprocessor semiconductor chips
- S. Voldman
- D. Hui
- et al.
- 2000
- Journal of Electrostatics
Electrostatic discharge (ESD) protection in silicon-on-insulator (SOI) CMOS technology with aluminum and copper interconnects in advanced microprocessor semiconductor chips
- S. Voldman
- D. Hui
- et al.
- 1999
- EOS/ESD 1999
Electrostatic discharge protection in silicon-on-insulator technology
- S. Voldman
- D. Hui
- et al.
- 1999
- IEEE International SOI Conference 1999
Frequency dependent behavior of a high performance dynamic register file in 1.8 V, 0.25 μm SOI technology
- R.V. Joshi
- W. Hwang
- et al.
- 1999
- IEEE International SOI Conference 1999
Device and circuit design issues in SOI technology
- G. Shahidi
- A. Ajmera
- et al.
- 1999
- CICC 1999
Implementation of a high speed multiport register file in a 1.8V, 0.25 μm CMOS bulk and SOI technology
- R.V. Joshi
- W. Hwang
- et al.
- 1999
- International Symposium on VLSI Technology, Systems, and Applications, Proceedings