Sub-25nm FinFET with advanced fin formation and short channel effect engineeringTenko YamashitaVeeraraghvan S. Baskeret al.2011VLSI Technology 2011
Modeling of width-quantization-induced variations in logic FinFETs for 22nm and beyondChung-Hsun LinWilfried Haenschet al.2011VLSI Technology 2011
Ultra-thin Body and BOX (UTBB) device for aggressive scaling of CMOS technologyQ. LiuA. Yagishitaet al.2011CSTIC 2011
Opportunities and challenges of FinFET as a device structure candidate for 14nm node CMOS technologyTenko YamashitaVeeraraghvan S. Baskeret al.2011CSTIC 2011
A 0.063 μm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitchVeeraraghvan S. BaskerTheodorus E. Standaertet al.2010VLSI Technology 2010
Ultra-thin-body and BOX (UTBB) Fully Depleted (FD) device integration for 22nm node and beyondQ. LiuA. Yagishitaet al.2010VLSI Technology 2010
On the systematic analysis of ring-delay performance using statistical behavior modelQ. LiangB. Greeneet al.2009ISDRS 2009
High performance 32nm SOI CMOS with high-k/metal gate and 0.149μm 2 SRAM and ultra low-k back end with eleven levels of copperB. GreeneQ. Lianget al.2009VLSI Technology 2009
SMT and enhanced SPT with Recessed SD to improve CMOS Device PerformanceS. FangS.S. Tanet al.2008ICSICT 2008
Recent progress and challenges in enabling embedded Si:C technologyB. YangZ. Renet al.2008ECS Meeting 2008