Reconfigurable multi-function logic based on graphene p-n junctions
- Sansiri Tanachutiwat
- Ji Ung Lee
- et al.
- 2010
- DAC 2010
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37 results for Chun Yung Sung
Development of graphene FETs for high frequency electronics
- Yu-Ming Lin
- Keith Jenkins
- et al.
- 2009
- IEDM 2009
(110) Channel, SiON gate-dielectric PMOS with record high Ion=1 mA/μm through channel stress and source drain external resistance (R ext) engineering
- B. Yang
- A. Waite
- et al.
- 2007
- IEDM 2007
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Direct silicon bonded (DSB) substrate solid phase epitaxy (SPE) integration scheme study for high performance bulk CMOS
- Haizhou Yin
- C.Y. Sung
- et al.
- 2006
- IEDM 2006
Challenges and opportunities for high performance 32 nm CMOS technology
- J. Sleight
- I. Lauer
- et al.
- 2006
- IEDM 2006
Amorphization/templated recrystallization (ATR) method for hybrid orientation substrates
- K.L. Saenger
- J.P. De Souza
- et al.
- 2006
- MRS Spring Meeting 2006
Systematic characterization of pseudomorphic (110) intrinsic SiGe epitaxial films for hybrid orientation technology with embedded SiGe source/drain
- Qiqing Ouyang
- Anita Madan
- et al.
- 2006
- MRS Spring Meeting 2006
High performance CMOS bulk technology using direct silicon bond (DSB) mixed crystal orientation substrates
- Chun-Yung Sung
- Haizhou Yin
- et al.
- 2005
- IEDM 2005
Selective epitaxial channel ground plane thin SOI CMOS devices
- Zhibin Ren
- M. Ieong
- et al.
- 2005
- IEDM 2005