A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing driftsin 45-nm SOI CMOS technologyGautam R. GangasaniChun-Ming Hsuet al.2012IEEE JSSC
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing drifts in 45-nm SOI CMOS technologyGautam R. GangasaniChun-Ming Hsuet al.2011CICC 2011