Improved effective switching current (Ieff+) and capacitance methodology for CMOS circuit performance prediction and model-to-hardware correlation
- Xiaojun Yu
- Shu-Jen Han
- et al.
- 2008
- IEDM 2008
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8 results for J. Deng
Advanced modeling and optimization of high performance 32nm HKMG SOI CMOS for RF/analog SoC applications
- Sungjae Lee
- J. Johnson
- et al.
- 2012
- VLSI Technology 2012
Extending technology roadmap by selective device footprint scaling and parasitics engineering
- Jie Deng
- Lan Wei
- et al.
- 2008
- VLSI-TSA 2008
Device footprint scaling for ultra thin body fully depleted SOI
- Jie Deng
- Keunwoo Kim
- et al.
- 2007
- ISQED 2007
Measuring frequency response of a single-walled carbon nanotube common-source amplifier
- Islamshah Amlani
- King F. Lee
- et al.
- 2009
- IEEE TNANO
Selective device structure scaling and parasitics engineering: A way to extend the technology roadmap
- Lan Wei
- Jie Deng
- et al.
- 2009
- IEEE Transactions on Electron Devices
Design methods for misaligned and mispositioned carbon-nanotube immune circuits
- Nishant Patil
- Jie Deng
- et al.
- 2008
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The impact of device footprint scaling on high-performance CMOS logic technology
- Jie Deng
- Keunwoo Kim
- et al.
- 2007
- IEEE Transactions on Electron Devices