Assessment of fully-depleted planar CMOS for low power complex circuit operation
- Zhibin Ren
- S. Mehta
- et al.
- 2011
- IEDM 2011
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22 results for T. Kanarsky
22 nm technology compatible fully functional 0.1 μm 2 6T-sram cell
- B. Haran
- A. Kumar
- et al.
- 2008
- IEDM 2008
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
Device Design Considerations for Ultra-Thin SOI MOSFETs
- B. Doris
- M. Ieong
- et al.
- 2003
- IEDM 2003
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
- Jakub Kedzierski
- Edward Nowak
- et al.
- 2002
- IEDM 2002
Extreme scaling with ultra-thin Si channel MOSFETs
- Bruce Doris
- Meikei Ieong
- et al.
- 2002
- IEDM 2002
Examination of hole mobility in ultra-thin body SOI MOSFETs
- Zhibin Ren
- Paul M. Solomon
- et al.
- 2002
- IEDM 2002
Sub-25nm FinFET with advanced fin formation and short channel effect engineering
- Tenko Yamashita
- Veeraraghvan S. Basker
- et al.
- 2011
- VLSI Technology 2011
High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
- D.-G. Park
- K. Stein
- et al.
- 2009
- VLSI-TSA 2009
FinFET resistance mitigation through design and process optimization
- Cindy Wang
- Josephine Chang
- et al.
- 2009
- VLSI-TSA 2009