A High-Density 6.9 sq. pm Embedded SRAM Cell in a High-Performance 0.25 μm-Generation CMOS Logic Technology
- S. Subbanna
- P. Agnello
- et al.
- 1996
- IEDM 1996
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50 results for B. Davari
Accurate measurement of pass-transistor leakage current in SOI MOSFETs
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- IEEE International SOI Conference 1996
History dependence of non-fully depleted (NFD) digital SOI circuits
- F. Assaderaghi
- G. Shahidi
- et al.
- 1996
- VLSI Technology 1996
0.25μm low power CMOS devices and circuits from 8 inch SOI materials
- B. Chen
- A.S. Yapsir
- et al.
- 1995
- ICSICT 1995
CMOS scaling in the 0.1-μm, 1.X-volt regime for high-performance applications
- G. Shahidi
- J. Warnock
- et al.
- 1995
- IBM J. Res. Dev
CMOS Scaling for High Performance and Low Power—The Next Ten Years
- Bijan Davari
- Robert H. Dennard
- et al.
- 1995
- Proceedings of the IEEE
Effect of the back gate conduction on 0.25 μm SOI devices
- J.L. Pelloie
- D.K. Sadana
- et al.
- 1994
- IEDM 1994
CMOS technology for low voltage/low power applications
- B. Davari
- R.H. Dennard
- et al.
- 1994
- CICC 1994
A Room Temperature 0.1 µm CMOS on SOI
- Ghavam G. Shahidi
- Carl A. Anderson
- et al.
- 1994
- IEEE Transactions on Electron Devices
SOI for a 1-Volt CMOS Technology and Application to a 512kb SRAM with 3.5 ns Access Time
- G. Shahidi
- T.H. Ning
- et al.
- 1993
- IEDM 1993