A 5GHz+ 128-bit binary floating-point adder for the POWER6 processor
- Xiao Yan Yu
- Yiu-Hing Chan
- et al.
- 2006
- ESSCIRC 2006
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2 results for Michael Kelly
A 270ps 20mW 108-bit end-around carry adder for multiply-add fused floating point unit
- Xiao Yan Zhang
- Yiu-Hing Chan
- et al.
- 2009
- Journal of Signal Processing Systems