A Double-Data-Rate 2 (DDR2) Interface Phase-Change Memory with 533MB/s Read-Write Data Rate and 37.5ns Access Latency for Memory-Type Storage Class Memory Applications
- H. Lung
- C. Miller
- et al.
- 2016
- IMW 2016
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123 results for Yu Zhu
CMOS compatible high performance IIIV devices: Opportunities and challenges
- Yanning Sun
- Kuen-Ting Shiu
- et al.
- 2016
- ECS Meeting 2016
Strong interfacial exchange field in the graphene/EuS heterostructure
- Peng Wei
- Sunwoo Lee
- et al.
- 2016
- Nature Materials
Titanium silicide/titanium nitride full metal gates for dual-channel gate-first CMOS
- Martin M. Frank
- Cyril Cabral
- et al.
- 2016
- IEEE Electron Device Letters
Application of cyclic fluorocarbon/argon discharges to device patterning
- Dominik Metzler
- Kishore Uppireddi
- et al.
- 2016
- JVSTA
A study on the long-term degradation of crystalline silicon solar cells metallized with Cu electroplating
- Qiang Huang
- Kathleen B. Reuter
- et al.
- 2015
- ECS J. Solid State Sci. Technol.
Critical BEOL aspects of the fabrication of a thermally-assisted MRAM device
- E.J. O'sullivan
- Daniel C. Edelstein
- et al.
- 2015
- ECS Meeting 2015 Phoenix
End-bonded contacts for carbon nanotube transistors with low, size-independent resistance
- Qing Cao
- Shu Jen Han
- et al.
- 2015
- Science
Greater than 2-bits/cell MLC storage for ultra high density phase change memory using a novel sensing scheme
- Jau-Yi Wu
- Win-San Khwa
- et al.
- 2015
- VLSI Technology 2015
A novel self-converging write scheme for 2-bits/cell phase change memory for Storage Class Memory (SCM) application
- W. Chien
- Yung-Han Ho
- et al.
- 2015
- VLSI Technology 2015