Layer Assignment for Multichip Modules
- Jan Ming Ho
- Majid Sarrafzadeh
- et al.
- 1990
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Partitioning Logic on Graph Structures to Minimize Routing Cost
- Gopalakrishnan Vijayan
- 1990
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal State Chains and State Codes in Finite State Machines
- Rainer Amann
- Utz G. Baitinger
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design of Multioutput CMOS Combinational Logic Circuits for Robust Testability
- Sandip Kundu
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Generation of Performance Constraints for Layout
- Ravi Nair
- C. Leonard Berman
- et al.
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On VHV-Routing in Channels with Irregular Boundaries
- Gopalakriskhnan Vijayan
- Howard H. Chen
- et al.
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Depth-First-Search and Dynamic Programming Algorithms for Efficient CMOS Cell Generation
- Reuven Bar-Yehuda
- Jack A. Feldman
- et al.
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal Aspect Ratios of Building Blocks in VLSI
- Shmuel Wimer
- Israel Koren
- et al.
- 1989
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A New Framework of Design Rules for Compaction of VLSI Layouts
- Jin-Fuw Lee
- 1988
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
TRIM: Testability Range by Ignoring the Memory
- Larry Carter
- Leendert M. Huisman
- et al.
- 1988
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems