A comparative study of NBTI and PBTI (Charge Trapping) in SiO 2/HfO2 stacks with FUSI, TiN, Re gatesS. ZafarY.-H. Kimet al.2006VLSI Technology 2006
RTA-driven intra-die variations in stage delay, and parametric sensitivities for 65nm technologyI. AhsanN. Zamdmeret al.2006VLSI Technology 2006
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyondV. NarayananV.K. Paruchuriet al.2006VLSI Technology 2006