Lower resistance scaled metal contacts to silicide for advanced CMOS
- A. Topol
- C. Sheraw
- et al.
- 2006
- VLSI Technology 2006
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13 results at VLSI Technology 2006
Poly-Si/AlN/HfSiO stack for ideal threshold voltage and mobility in sub-100 nm MOSFETs
- K.-L. Lee
- M.M. Frank
- et al.
- 2006
- VLSI Technology 2006
A comparative study of NBTI and PBTI (Charge Trapping) in SiO 2/HfO2 stacks with FUSI, TiN, Re gates
- S. Zafar
- Y.-H. Kim
- et al.
- 2006
- VLSI Technology 2006
Novel approach to reduce source/drain series resistance in high performance CMOS devices using self-aligned CoWP process for 45nm node UTSOI transistors with 20nm gate length
- James Pan
- Anna Topol
- et al.
- 2006
- VLSI Technology 2006
Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substrates
- Haizhou Yin
- Z. Ren
- et al.
- 2006
- VLSI Technology 2006
Stress proximity technique for performance improvement with dual stress liner at 45nm technology and beyond
- X. Chen
- S. Fang
- et al.
- 2006
- VLSI Technology 2006
Novel one-mask self-heating pillar phase change memory
- T.D. Happ
- M. Breitwisch
- et al.
- 2006
- VLSI Technology 2006
A new route to ultra-high density memory using the Micro to Nano Addressing Block (MNAB)
- R.S. Shenoy
- K. Gopalakrishnan
- et al.
- 2006
- VLSI Technology 2006
Investigation of FinFET devices for 32nm technologies and beyond
- H. Shang
- L. Chang
- et al.
- 2006
- VLSI Technology 2006
Silicon-on-insulator MOSFETs with hybrid crystal orientations
- M. Yang
- K.K. Chan
- et al.
- 2006
- VLSI Technology 2006