A Power-Optimized Widely-Tunable 5-GHz Monolithic VCO in a Digital SOI CMOS Technology on High Resistivity Substrate
- Jonghae Kim
- Jean-Olivier Plouchart
- et al.
- 2003
- ISLPED 2003
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17 results at ISLPED 2003
A semi-custom voltage-island technique and its application to high-speed serial links [CMOS active power reduction]
- J.-A. Carballo
- Jeffrey L. Burns
- et al.
- 2003
- ISLPED 2003
Leakage and leakage sensitivity computation for combinational circuits
- E. Acar
- A. Devgan
- et al.
- 2003
- ISLPED 2003
Efficient Techniques for Gate Leakage Estimation
- Rahul M. Rao
- Jeffrey L. Burns
- et al.
- 2003
- ISLPED 2003
Leakage and Leakage Sensitivity Computation for Combinational Circuits
- Emrah Acar
- Anirudh Devgan
- et al.
- 2003
- ISLPED 2003
Efficient techniques for gate leakage estimation
- R.M. Rao
- Jeffrey L. Burns
- et al.
- 2003
- ISLPED 2003
A Semi-Custom Voltage-Island Technique and Its Application to High-Speed Serial Links
- Juan-Antonio Carballo
- Jeffrey L. Burns
- et al.
- 2003
- ISLPED 2003
Strained-Si devices and circuits for low-power applications
- Keunwoo Kim
- R.V. Joshi
- et al.
- 2003
- ISLPED 2003
Reducing instruction fetch energy with backwards branch control information and buffering
- J.A. Rivers
- S. Asaad
- et al.
- 2003
- ISLPED 2003
Understanding and minimizing ground bounce during mode transition of power gating structures
- S. Kim
- S.V. Kosonocky
- et al.
- 2003
- ISLPED 2003