Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures
- 2022
- IEEE Computer Architecture Letters
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13 results at IEEE Computer Architecture Letters
Mitigating Power Contention: A Scheduling Based Approach
- Hiroshi Sasaki
- Alper Buyuktosunoglu
- et al.
- 2017
- IEEE Computer Architecture Letters
DRAMATON: A Near-DRAM Accelerator for Large Number Theoretic Transforms
- Yongmo Park
- Subhankar Pal
- et al.
- 2024
- IEEE Computer Architecture Letters
SoCurity: A Design Approach for Enhancing SoC Security
- Naorin Hossain
- Alper Buyuktosunoglu
- et al.
- 2023
- IEEE Computer Architecture Letters
Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms
- Argyris Kokkinis
- Dionysios Diamantopoulos
- et al.
- 2021
- IEEE Computer Architecture Letters
Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles
- Aporva Amarnath
- Subhankar Pal
- et al.
- 2021
- IEEE Computer Architecture Letters
Asymmetric Resilience for Accelerator-Rich Systems
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2019
- IEEE Computer Architecture Letters
PATer: A hardware prefetching automatic tuner on IBM POWER8 processor
- Minghua Li
- Guancheng Chen
- et al.
- 2016
- IEEE Computer Architecture Letters
SMT switch: Software mechanisms for power shifting
- Priyanka Tembey
- Augusto Vega
- et al.
- 2013
- IEEE Computer Architecture Letters
Atomic streaming: A framework of on-chip data supply system for task-parallel MPSoCs
- Ji Kong
- Peilin Liu
- et al.
- 2012
- IEEE Computer Architecture Letters