Characterization and Analysis of Bit Errors in 3D TLC NAND Flash Memory
- 2019
- IRPS 2019
Haris Pozidis received a B.S. degree in Computer Engineering and Informatics from the University of Patras, Greece, in 1994, and M.Sc. and Ph.D. degrees in Electrical Engineering from Drexel University, Philadelphia, U.S.A., in 1997 and 1998, respectively.
Between 1998 and 2001 he was with Philips Research, Eindhoven, The Netherlands, where he worked on read channel design for DVD and Blu-ray Disc optical recording formats. In 2001 he joined IBM Research – Zurich, Switzerland, to work on recording technology, signal processing and system-level design for scanning-probe data-storage devices.
He currently manages the Infrastructure AIOps group at the Zurich laboratory, which focuses on the design of algorithms for scalable, accelerated machine learning, on the development of Flash memory controllers for all-flash arrays, and on AI-infused systems for improving cloud resiliency and operations (AIOps).
Dr. Pozidis holds over 160 US and European patents in the areas of scalable machine learning systems, storage systems, solid-state memory technology, probe-based data storage, control systems technology and optical data storage. He has co-authored more than 120 journal and conference publications in the above areas.
In 2009, we was co-recipient of the IEEE Control Systems Technology Award and the IEEE Transactions on Control Systems Technology Outstanding Paper Award. He is an IBM Principal Research Scientist, an IBM Master Inventor, and a Senior Member of the IEEE.