Phase Change Memory-based Hardware Accelerators for Deep Neural Networks
- Geoffrey Burr
- Pritish Narayanan
- et al.
- 2023
- VLSI Technology 2023
a) Technical Position :
Technical Master (2006)
b) Technical Area :
VLSI circuit design (digital, analog & array circuits)
Signal processing (PLL, Clock Gen. & Distribution, Power System etc.)
Magnetic recording
c) IBM Task Activities :
IBM Academy Meeting 1999 - Guest Presentation
TECH-J Hardware Member (2005 - )
d) Research Activities Outside IBM :
Ph.D of informatics Semiconductor Integrated Circuit from Kyoto Univ. Mar. 2001
Doctorate thesis title : Circuit Technologies for High Performance Hard Disk Drive Data Channel LSI
e) Seminar Lecturer Activities :
CMOS Analog Circuit Design Seminar in Ritsumeikan Univ. - 2002 and 2003.
Analog Electronics Circuit Regular Course in Ritsumeikan Univ. (Visiting Scholar) 2012 - Present
f) External Committee :
JEITA Integrated Circuit Group
Low Voltage IC Sub-committee Manager (Apr. 2005 - )
IEEE Computer Society Kansai Chapter Secretary (Jan. 2009 - Dec. 2010)
Chairperson (Jan. 2011 - )
Degree
Ph.D of informatics :
Majoring Semiconductor Integrated Circuit from Kyoto Univ. Apr. 1998 - Mar. 2001
Doctorate thesis title : Circuit Technologies for High Performance Hard Disk Drive Data Channel LSI