Stable SRAM cell design for the 32 nm node and beyond
Leland Chang, David M. Fried, et al.
VLSI Technology 2005
A 2T1D dynamic memory cell with two transistors (T) and a gated diode (D) is presented. A gated diode is a two terminal MOS device in which charge is stored when a voltage above the threshold voltage is applied between the gate and the source, and negligible charge is stored otherwise. The gated diode acts as a nonlinear capacitance for voltage boosting, where voltage for 1-data is boosted high and voltage for 0-data stays low, achieving significant voltage gain of the internal stored voltage, higher signal margin, higher current drive and low-voltage memory operation. Details about the gated diode structure, its signal amplification, the memory cell circuits and the array structure, some hardware and test results are presented, followed by comparison to other memory cells and future directions. © 2005 IEEE.
Leland Chang, David M. Fried, et al.
VLSI Technology 2005
Leland Chang, David J. Frank, et al.
Proceedings of the IEEE
Alina Deutsch, Gerard V. Kopcsay, et al.
IEEE T-MTT
George A. Sai-Halasz, Matthew R. Wordeman, et al.
IEEE Journal of Solid-State Circuits