Analysis and modeling of threshold voltage mismatch for CMOS at 65 nm and beyond

Jeffrey B. Johnson; Terence B. Hook; Yoo-Mi Lee

doi:10.1109/LED.2008.2000649

IEEE Electron Device Letters

Paper

01 Jul 2008

Analysis and modeling of threshold voltage mismatch for CMOS at 65 nm and beyond

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Abstract

This letter investigates random dopant fluctuation transistor mismatch. The dominance of the halo implant is demonstrated experimentally and with simulation, and a compact model form is developed for improved representation of the phenomenon. © 2008 IEEE.

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