G. Almasi, D. Hale, et al.
Concurrency: Practice and Experience
System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.
G. Almasi, D. Hale, et al.
Concurrency: Practice and Experience
G. Almasi, G. Almasi, et al.
ISSCC 2002
D. Beece, R. Damiano, et al.
EDAC 1990
N.R. Adiga, G. Almasi, et al.
ACM/IEEE SC 2002