J.E. Demuth, D. Schmeisser, et al.
Physical Review Letters
A device design for CNFETs that can be scaled down in size for good turn-on performance without severe restrictions on the usable drain voltage is presented. The key idea of the design is to have large electric fields at the source contact but small fields at the drain, to suppress unwanted tunneling.
J.E. Demuth, D. Schmeisser, et al.
Physical Review Letters
J. Tersoff
Physical Review Letters
M. Morgenstern, D. Haude, et al.
Physica E: Low-Dimensional Systems and Nanostructures
S. Kodambaka, J. Tersoff, et al.
SPIE OPTO 2009