Kazuya Ohuchi, Christian Lavoie, et al.
IEDM 2007
We discuss the structural and electrical properties of scaled 2 nm HfO 2 /SrO gate stacks. Thin SrO layers are deposited by molecular beam epitaxy onto (001) p-Si substrates as alternative passivating interfacial layers (ILs) to SiO2. X-ray photoelectron spectroscopy and transmission electron microscopy show that, despite some HfO2 -SrO intermixing, the SrO IL acts as a barrier against Hfx Siy and SiO 2 formation during high- κ deposition. Electrical measurements on metal-oxide-semiconductor capacitors with TiN metal gates integrated in a low-temperature process flow reveal an equivalent oxide thickness of 5 Å with competitive leakage current and hysteresis and a negative flat band voltage shift, suitable for n -channel transistors. © 2011 American Institute of Physics.
Kazuya Ohuchi, Christian Lavoie, et al.
IEDM 2007
Catherine Dubourdieu, John Bruley, et al.
Nature Nanotechnology
D.H. Hill, R.A. Bartynski, et al.
Journal of Applied Physics
Soon-Cheon Seo, L.F. Edge, et al.
VLSI Technology 2011