Caroline Andersson, Marilyne Sousa, et al.
ESSDERC 2009
In this letter we report on high-performance InGaAs FinFETs with optimized on-off trade-off. The InGaAs FinFETs are fabricated on silicon substrate using a CMOS-compatible replacement-metal-gate process. Excellent off-state performance is achieved by introducing source-drain spacers and doped extension regions. Extensions are fabricated using a digital etching process, a cycling etching technique that allows one to carefully control the position of the junction underneath the spacers. FinFETs with gate length of 13 nm show an on-current of 300 μA μm-1 at V DD = 0.5 V and fixed I OFF = 100 nA μm-1, the highest reported for ultra-scaled Si CMOS-compatible III-V FETs.
Caroline Andersson, Marilyne Sousa, et al.
ESSDERC 2009
N. Daix, Lukas Czornomaz, et al.
S3S 2013
Mikhail Churaev, Annina Riedhauser, et al.
CLEO/Europe 2021
Lukas Czornomaz, N. Daix, et al.
IEDM 2013