Impact of interface traps on charge noise and low-density transport properties in Ge/SiGe heterostructures

Hole spins in Ge/SiGe heterostructures have emerged as an interesting qubit platform with favourable properties such as fast electrical control and noise-resilient operation at sweet spots. However, commonly observed gate-induced electrostatic disorder, drifts, and hysteresis hinder reproducible tune-up of SiGe-based quantum dot arrays. Here, we study Hall bar and quantum dot devices fabricated on Ge/SiGe heterostructures and present a consistent model for the origin of gate hysteresis and its impact on transport metrics and charge noise. As we push the accumulation voltages more negative, we observe non-monotonous changes in the low-density transport metrics, attributed to the induced gradual filling of a spatially varying density of charge traps at the SiGe-oxide interface. With each gate voltage push, we find local activation of a transient low-frequency charge noise component that completely vanishes again after 30 hours. Our results highlight the resilience of the SiGe material platform to interface-trap-induced disorder and noise and pave the way for reproducible tuning of larger multi-dot systems.