C.T. Black, K.W. Guarini, et al.
Materials Research Society Symposium - Proceedings
Silicon capacitors with increased charge storage capacity over planar structures were produced by combining self-organizing diblock copolymer system with semiconductor processing. Diblock copolymer thin films were used as a mask for dry etching to roughen a silicon surface. This was done on a 30 nm length scale, which was well below photolithographic resolution limits. Silicon etch depth was correlated with capacitance values using electron microscopy. This block copolymer nanotemplating process is scalable to large wafer dimensions and compatible to standard semiconductor processing techniques.
C.T. Black, K.W. Guarini, et al.
Materials Research Society Symposium - Proceedings
C.T. Black
Applied Physics Letters
C.T. Black, K.W. Guarini
J Polym Sci Part A
V. Narayanan, A.C. Callegari, et al.
VLSI Technology 2004