Eloisa Bentivegna
Big Data 2022
We introduce a planar, triple-self-aligned double-gate FET structure ("PAGODA"). Device fabrication incorporates wafer bonding, front-end CMP, mixed optical/ebeam lithography, silicided silicon source/drain sidewalls, and back gate undercut and passivation. We demonstrate double-gate FET operation with good transport at both interfaces, inverter action, and NOR logic.
Eloisa Bentivegna
Big Data 2022
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009
R. Ghez, M.B. Small
JES
Xikun Hu, Wenlin Liu, et al.
IEEE J-STARS