Toyohiro Aoki, Kazushige Toriyama, et al.
ICEP 2014
Flip chip technology is widely used on the electronic packaging, and the market forces drive toward finer pitch interconnection. Cu pillar bump structure is a currently trend of the fine pitch flip chip package with less than 100μm bump pitch. But there is a solder volume limitation on solder capped Cu pillar bump structure. In addition, Cu may easily react with Sn-based solder into intermetallic compounds (IMCs). So it may be difficult for much finer pitch application with the structure. © 2012 IEEE.
Toyohiro Aoki, Kazushige Toriyama, et al.
ICEP 2014
Akihiro Horibe, Keishi Okamoto, et al.
ECTC 2013
Yasumitsu Orii, Akihiro Horibe, et al.
Pan Pacific 2016
Hiroyuki Mori, Sayuri Kohara, et al.
InterPACK 2015