LONG RANGE VLSI TECHNOLOGY CHALLENGES.

Abstract

Possible limits to VLSI are explored with focus on the problems of down-scaling Si-MOSFETs. It is likely that, with careful compromises, a 0. 25 mu m channel length design should be attainable, although with somewhat degraded performance from the ideal. Low temperature operation of the circuits would further extend the limits of technology. For the near future the barriers in the path of VLSI are not clearly defined and high premium is placed on the ingenuity of particular designs in circumventing the obstacles. Technologies, other than Si-FET based ones, are likely to find their place in future VLSI, as well.