Invited talk

Nano-structured magnetic tunnel junctions as compact, low power integrated entropy sources for advanced computing

Abstract

A nano-structured magnetic tunnel junction (MTJ) is being explored as random bits for advanced computing with near-logic CMOS back-end integration. Two general operation modes have been demonstrated with device-level experiments. One uses super-paramagnetic fluctuation MTJ (sMTJ) as a read-only device[1]. The other utilizes spin-transfer-torque (STT) switched MTJ in high write-error region (wMTJ)[2]. Easy-plane sMTJs demonstrated bit-streams passing the NIST-SP800 randomness checks, with highest bit-rate seen in synthetic antiferromagnetic free-layer based MTJs, reaching 0.5 ∼ 1 Gbps[3]. For wMTJs, the write-statistics is known as in STT-memory, and randomness is also experimentally validated with NIST standards[2,4]. Since wMTJ needs write operation with high on-state transient current, it shares some scaling characteristics for underlying CMOS as STT-memory. Both approaches use CMOS back-end MTJs with ≪ 100 × 100 nm2 footprint. Integration-wise, both are viable for commercial foundry CMOS technologies. sMTJ is compatible at all advanced nodes, but require specific materials design and development for a sizable reduction of magnetostriction induced random in-plane anisotropy[3], while wMTJ is directly compatible, and can co-exist on the same chip, with STT-MRAM products, involving only re-designing a portion of circuits for random-bits. In terms of performance, sMTJ is more suitable for applications requiring very high data-rate random bits near logic processors, such as probabilistic computing or large-scale statistical modeling, while wMTJ is ready for use in, for example, edge-oriented micro-controllers providing the necessary entropy source either for computing or for enhancing cryptography. I will discuss some of our experiences with both classes of MTJ devices for random-bit generation, the fundamental materials and device physics findings, as well as challenges lying ahead for technology integration.

References: [1] Nihal Sanjay Singh, et. al: CMOS plus stochastic nanomagnets enabling heterogeneous computers for probabilistic inference and learning. Nature Commun., 15, 2024. [2] Ankit Shukla, et. al: A true random number generator for probabilistic computing using stochastic magnetic actuated random transducer devices. In 24th International Symposium on Quality Electronic Design, pages 979–8–3503–3475–3/23, DOI: 10.1109/ISQED57927.2023.10129319, 2023. IEEE Xplore. [3] Jonathan Z. Sun, et al: Easy-plane dominant stochastic magnetic tunnel junction with synthetic antiferromagnetic layers. Phys. Rev. B, 108, Aug 2023. [4] L. Rehm, et al: Stochastic magnetic actuated random transducer devices based on perpendicular magnetic tunnel junctions, Phys. Rev. Appl. 19, 024035 (2023)