D. Heidel, S. Dhong, et al.
VTS 1998
We report a virtual supply domain control technique for low-leakage SRAMs. This method encompasses cell-based sleep circuit tiling, sequentially regulated poweron/off, and flexible domain interfacing. The usual overhead associated with driving sleep transistors is significantly reduced by powering on/off gradually. Over 26Ox and 3x leakage reduction is observed in 65nm-technology hardware for hard and soft gating, respectively, including the leakage of control and drive circuits. Measured virtual domain power-on latency is compatible with high-frequency designs. © 2006 IEEE.
D. Heidel, S. Dhong, et al.
VTS 1998
S.D. Posluszny, Naoaki Aoki, et al.
DAC 2000
Jose Bonan, Christoph Hagleitner, et al.
ESSCIRC 2006
Ullrich R. Pfeiffer
ESSCIRC 2006