A 1V 18GHz clock generator in a 65nm PD-SOI technology
- Fadi H. Gebara
- Jeremy D. Schaub
- et al.
- 2007
- ISSCC 2007
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12 results for Tuyet Y. Nguyen
A double precision floating point multiply
- Robert Montoye
- Wendy Belluomini
- et al.
- 2003
- ISSCC 2003
A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b powerPC processor
- Kevin Nowka
- Gary Carpenter
- et al.
- 2002
- ISSCC 2002
A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b PowerPC processor
- Kevin Nowka
- Gary Carpenter
- et al.
- 2002
- ISSCC 2002
An on-chip dual supply charge pump system for 45nm PD SOI eDRAM
- J.B. Kuang
- A. Mathews
- et al.
- 2008
- ESSCIRC 2008
Gate leakage effects on yield and design considerations of PD/SOI SRAM designs
- Rouwaida Kanj
- Rajiv Joshi
- et al.
- 2007
- ISQED 2007
The design and implementation of a low-overhead supply-gated SRAM
- J.B. Kuang
- Hung Ngo
- et al.
- 2006
- ESSCIRC 2006
Resonant clocking using distributed parasitic capacitance
- Alan J. Drake
- Kevin J. Nowka
- et al.
- 2003
- CICC 2003
Design considerations for PD/SOI SRAM: Impact of gate leakage and threshold voltage variation
- Rouwaida Kanj
- Rajiv V. Joshi
- et al.
- 2008
- IEEE Trans Semicond Manuf
Resonant clocking using distributed parasitic capacitance
- Alan J. Drake
- Kevin J. Nowka
- et al.
- 2004
- IEEE Journal of Solid-State Circuits