Reactive ion etching processes for amorphous germanium alloys
Y. Kuo
MRS Fall Meeting 1993
Titanium silicides are used as source, gate and drain contacts and local interconnections in CMOS integrated circuits. In these applications, it is important that the titanium silicide phase have a low resistivity (< 20μΩ-cm) and not agglomerate during high temperature processing. The Ti/Si system has two silicide phases that are useful for electronic applications, high resistivity C49-TiSi2 (60-70 μΩ-cm) which forms at 600 - 700°C and low resistivity (15-20 μΩ-cm) C54-TiSi2 which forms from 700 to 850°C. This paper will review how the size of the thermal annealing process window for forming low resistivity C54-TiSi2 from high resistivity C49-TiSi2 without having the silicide agglomerate varies with annealing treatments, electronic dopants, and contact size. In addition, processing methods to improve the size of the process window will be discussed.
Y. Kuo
MRS Fall Meeting 1993
L.K. Wang, A. Acovic, et al.
MRS Spring Meeting 1993
D.B. Laks, D. Maroudas, et al.
MRS Fall Meeting 1993
Sharee J. McNab, Richard J. Blaikie
Materials Research Society Symposium - Proceedings