Using CMP model for 45nm/32nm BEOL process and design evaluations

Abstract

Chemical Mechanical Polishing (CMP) is an essential process in semiconductor manufacturing. It is known to suffer from pattern dependencies such as dishing and erosion, which can lead to potential yield and performance problems, including copper pooling and excessive copper loss. These problems become very significant as lateral and vertical dimensions continue to shrink. They can therefore no longer be neglected in advanced node designs for optimal yield and performance. In this paper, we demonstrate a physics based CMP model in predicting metal line heights in macros with pattern factors from 10% to 90%. Model based checking as opposed to rule based checking can identify more accurately the weak points in a design and enable designers to provide improved layout for areas that will cause under polish or excessive erosion for a given CMP process. Thus CMP modeling can provide information on interlevel effects such as copper puddling from underlying topography that cannot be captured in recommended design rules. ©The Electrochemical Society.