EXPERIMENTAL TECHNOLOGY AND CHARACTERIZATION OF SELF-ALIGNED 0. 1 mu M-GATE-LENGTH LOW-TEMPERATURE OPERATION NMOS DEVICES.
- G.A. Sai-Halasz
- M.R. Wordeman
- et al.
- 1986
- IEDM 1986
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Design and Experimental Technology for 0.1-μm Gate-Length Low-Temperature Operation FET's
- George A. Sai-Halasz
- Matthew R. Wordeman
- et al.
- 1987
- IEEE Electron Device Letters