Characterization of micro-bump C4 interconnects for Si-carrier SOP applications
- S.L. Wright
- R.J. Polastre
- et al.
- 2006
- ECTC 2006
Publications
Date
Featured collections
Popular topics
29 results for L.P. Buchwalter
A CMOS-compatible process for fabricating electrical through-vias in silicon
- P. Andry
- C. Tsang
- et al.
- 2006
- ECTC 2006
System-on-Package (SOP) technology, characterization and applications
- J. Knickerbocker
- P. Andry
- et al.
- 2006
- ECTC 2006
Pb-free micro-joints (50 μm pitch) for the next generation micro-systems: The fabrication, assembly and characterization
- H. Gan
- S.L. Wright
- et al.
- 2006
- ECTC 2006
Advanced chemical-mechanical planarization (CMP) for enabling silicon carrier integration with through-vias and fine pitch wiring
- Cornelia K. Tsang
- Donald F. Canaperi
- et al.
- 2006
- CMP-MIC 2006
3-D silicon integration and silicon packaging technology using silicon through-vias
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2006
- IEEE Journal of Solid-State Circuits
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ADMETA 2005
Silicon carrier with deep through-vias, fine pitch wiring, and through cavity for parallel optical transceiver
- Chirag S. Patel
- Cornelia K. Tsang
- et al.
- 2005
- ECTC 2005
Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection
- John U. Knickerbocker
- Paul S. Andry
- et al.
- 2005
- IBM J. Res. Dev
Characterization of water vapor plasma‐modified polyimide
- R.D. Goldblatt
- L. Ferreiro
- et al.
- 2003
- Journal of Applied Polymer Science