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Uniaxial strain relaxation on ultra-thin strained-Si directly on insulator (SSDOI) substratesHaizhou YinZ. Renet al.2006ICSICT 2006
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Novel approach to reduce source/drain series resistance in high performance CMOS devices using self-aligned CoWP process for 45nm node UTSOI transistors with 20nm gate lengthJames PanAnna Topolet al.2006VLSI Technology 2006
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Lower resistance scaled metal contacts to silicide for advanced CMOSA. TopolC. Sherawet al.2006VLSI Technology 2006
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyondV. NarayananV.K. Paruchuriet al.2006VLSI Technology 2006
Silicon-on-insulator MOSFETs with hybrid crystal orientationsM. YangK.K. Chanet al.2006VLSI Technology 2006