Novel enhanced stressor with graded embedded SiGe source/drain for high performance CMOS devices
- J.-P. Han
- H. Utomo
- et al.
- 2006
- IEDM 2006
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Structure, design and process control for Cu bonded interconnects in 3D integrated circuits
- Kuan-Neng Chen
- Sang Hwui Lee
- et al.
- 2006
- IEDM 2006
Systematic characterization of pseudomorphic (110) intrinsic SiGe epitaxial films for hybrid orientation technology with embedded SiGe source/drain
- Qiqing Ouyang
- Anita Madan
- et al.
- 2006
- MRS Spring Meeting 2006
Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
- Y.-H. Kim
- C. Cabral Jr.
- et al.
- 2005
- IEDM 2005
Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- D. Singh
- J. Sleight
- et al.
- 2005
- IEDM 2005
Selective epitaxial channel ground plane thin SOI CMOS devices
- Zhibin Ren
- M. Ieong
- et al.
- 2005
- IEDM 2005
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- IEDM 2005
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
Aggressively scaled (0.143 μm 2) 6T-SRAM cell for the 32 nm node and beyond
- D. Fried
- J. Hergenrother
- et al.
- 2004
- IEDM 2004