Integration of local stress techniques with strained-Si directly on insulator (SSDOI) substrates
- Haizhou Yin
- Z. Ren
- et al.
- 2006
- VLSI Technology 2006
Publications
90 results for Meikei Ieong
Poly-Si/AlN/HfSiO stack for ideal threshold voltage and mobility in sub-100 nm MOSFETs
- K.-L. Lee
- M.M. Frank
- et al.
- 2006
- VLSI Technology 2006
Tunable Workfunction for Fully Silicied Gates (FUSI) and Proposed Mechanisms
- Y.-H. Kim
- C. Cabral Jr.
- et al.
- 2006
- VLSI-TSA 2006
Lower resistance scaled metal contacts to silicide for advanced CMOS
- A. Topol
- C. Sheraw
- et al.
- 2006
- VLSI Technology 2006
Band-edge high-performance high-κ /metal gate n-MOSFETs using cap layers containing group IIA and IIIB elements with gate-first processing for 45 nm and beyond
- V. Narayanan
- V.K. Paruchuri
- et al.
- 2006
- VLSI Technology 2006
Novel approach to reduce source/drain series resistance in high performance CMOS devices using self-aligned CoWP process for 45nm node UTSOI transistors with 20nm gate length
- James Pan
- Anna Topol
- et al.
- 2006
- VLSI Technology 2006
Process induced stress for CMOS performance improvement
- S. Fang
- S.S. Tan
- et al.
- 2006
- ICSICT 2006
Three-dimensional integrated circuits
- Anna W. Topol
- Douglas C. La Tulipe Jr.
- et al.
- 2006
- IBM J. Res. Dev
Transistor scaling with novel materials
- Meikei Ieong
- Vijay Narayanan
- et al.
- 2006
- Materials Today
Hybrid-orientation technology (HOT): Opportunities and challenges
- Min Yang
- Victor W.C. Chan
- et al.
- 2006
- IEEE Transactions on Electron Devices