A 300-mm wafer-level three-dimensional integration scheme using tungsten through-silicon via and hybrid cu-adhesive bonding
- F. Liu
- R.R. Yu
- et al.
- 2008
- IEDM 2008
Publications
Date
Featured collections
Popular topics
20 results for Albert Young
Programmable via using indirectly heated phase-change switch for reconfigurable logic applications
- Ku N. Chen
- L. Krusin-Elbaum
- et al.
- 2008
- IEEE Electron Device Letters
Wafer-level 3D integration technology
- Steven J. Koester
- Albert M. Young
- et al.
- 2008
- IBM J. Res. Dev
Interconnects in the third dimension: Design challenges for 3D ICs
- Kerry Bernstein
- Paul Andry
- et al.
- 2007
- DAC 2007
Structure, design and process control for Cu bonded interconnects in 3D integrated circuits
- Kuan-Neng Chen
- Sang Hwui Lee
- et al.
- 2006
- IEDM 2006
Improved manufacturability of Cu bond pads and implementation of seal design in 3D integrated circuits and packages
- K.N. Chen
- C. Tsang
- et al.
- 2006
- VMIC 2006
Critical aspects of layer transfer and alignment tolerances for 3D integration processes
- D.C. La Tulipe
- L.T. Shi
- et al.
- 2006
- GBC 2006
Three-dimensional integrated circuits
- Anna W. Topol
- Douglas C. La Tulipe Jr.
- et al.
- 2006
- IBM J. Res. Dev
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- IEDM 2005
Assembly technology for three dimensional integrated circuits
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- VMIC 2005