Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
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20 results for Albert Young
Reliability of a 300-mm-compatible 3DI technology based on hybrid Cu-adhesive wafer bonding
- R.R. Yu
- F. Liu
- et al.
- 2009
- VLSI Technology 2009
Improved manufacturability of Cu bond pads and implementation of seal design in 3D integrated circuits and packages
- K.N. Chen
- C. Tsang
- et al.
- 2006
- VMIC 2006
Critical aspects of layer transfer and alignment tolerances for 3D integration processes
- D.C. La Tulipe
- L.T. Shi
- et al.
- 2006
- GBC 2006
Assembly technology for three dimensional integrated circuits
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- VMIC 2005
Characterization of TSV-induced loss and substrate noise coupling in advanced three-dimensional CMOS SOI technology
- Xiaoxiong Gu
- Joel A. Silberman
- et al.
- 2013
- IEEE Transactions on CPMT
Design and modeling methodology of vertical interconnects for 3DI applications
- Rachel Gordin
- David Goren
- et al.
- 2011
- IEEE Transactions on CPMT
Electrical performances and structural designs of copper bonding in wafer-level three-dimensional integration
- K.N. Chen
- A. Young
- et al.
- 2011
- Journal of Nanoscience and Nanotechnology
Wafer-level 3D integration technology
- Steven J. Koester
- Albert M. Young
- et al.
- 2008
- IBM J. Res. Dev
Three-dimensional integrated circuits
- Anna W. Topol
- Douglas C. La Tulipe Jr.
- et al.
- 2006
- IBM J. Res. Dev