Gate-Cut-Last in RMG to Enable Gate Extension Scaling and Parasitic Capacitance Reduction
- A. Greene
- Huimei Zhou
- et al.
- 2019
- VLSI Technology 2019
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40 results for Sivananda Kanakasabapathy
Nitride etching with hydrofluorocarbons III: Comparison of C4H9F and CH3F for low-k′ nitride spacer etch processes
- Hiroyuki Miyazoe
- Nathan Marchack
- et al.
- 2018
- JVSTB
SiGe FinFET for practical logic libraries by mitigating local layout effect
- G. Tsutsui
- Huimei Zhou
- et al.
- 2017
- VLSI Technology 2017
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Development of TiO2 containing hardmasks through plasma-enhanced atomic layer deposition
- Anuja De Silva
- Indira Seshadri
- et al.
- 2017
- J. Micro/Nanolithogr. MEMS MOEMS
Development of TiO2 containing hardmasks through PEALD deposition
- Anuja De Silva
- Indira Seshadri
- et al.
- 2017
- SPIE Advanced Lithography 2017
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
Technology viable DC performance elements for Si/SiGe channel CMOS FinFTT
- G. Tsutsui
- Ruqiang Bao
- et al.
- 2016
- IEDM 2016
CMOS compatible MIM decoupling capacitor with reliable sub-nm EOT high-k stacks for the 7 nm node and beyond
- Takashi Ando
- Eduard Cartier
- et al.
- 2016
- IEDM 2016
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016