Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
In this paper, we present for the first time a 'Gate-Cut-Last' integration scheme completed within the Replacement Metal Gate (RMG) module. This novel gate cut (CT) technique allows the scaling of gate extension length past the end fin which reduces parasitic capacitance, leakage and performance variation. In addition, we demonstrate that CT-in-RMG is a promising alternative integration process that can enable scaling for future logic technology nodes. Device, circuit and reliability results are shown to compare this novel CT-in-RMG process to the conventional gate cut method.
Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Tian Shen, K. Watanabe, et al.
IRPS 2020
G. Tsutsui, C. Durfee, et al.
VLSI Technology 2018
Victor Chan, M. Bergendahl, et al.
ASMC 2020