Technology viable DC performance elements for Si/SiGe channel CMOS FinFTTG. TsutsuiRuqiang Baoet al.2016IEDM 2016
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applicationsS. KrishnanU. Kwonet al.2011IEDM 2011
Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet TransistorMiaomiao WangJingyun Zhanget al.2019IRPS 2019
Failure isolation in ring oscillator circuit and defect detection in CMOS technology researchVictor ChanM. Bergendahlet al.2019ASMC 2019
Study of titanium nitride underlayer properties and its influence on tungsten growthShanti PancharatnamJ. Wynneet al.2018ASMC 2018
Ring oscillator yield learning methodologies for CMOS technology researchVictor ChanD. Leaet al.2018ASMC 2018
SiGe FinFET for practical logic libraries by mitigating local layout effectG. TsutsuiHuimei Zhouet al.2017VLSI Technology 2017
FINFET technology featuring high mobility SiGe channel for 10nm and beyondDechao GuoG. Karveet al.2016VLSI Technology 2016
Study of dark counts in Geiger mode in 0.53Ga 0.47As / in 0.52Al 0.48gAs SACM APDsG. KarveS. Wanget al.2004LEOS 2004
In0.53Ga0.47As/In0.52Al0.48A s SACM APDs for single photon detectionG. KarveX. Zhenget al.2003LEOS 2003