Publications

2 results for Xuejue Huang

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design
- - Xuejue Huang
  - Phillip Restle
  - et al.
- 2003
- IEEE Journal of Solid-State Circuits
Loop-based interconnect modeling and optimization approach for multi-GHz clock network design
- - Xuejue Huang
  - Phillip Restle
  - et al.
- 2002
- Proceedings of the Custom Integrated Circuits Conference