A 16-Mb MR AM featuring bootstrapped write driversDietmar GoglChristian Arndtet al.2005IEEE Journal of Solid-State Circuits
A 7F2 cell and bitline architecture featuring tilted array devices and penalty-free vertical BL twists for 4-Gb DRAM'sHeinz HoenigschmidAlexander Freyet al.2000IEEE Journal of Solid-State Circuits