High performance of planar double gate MOSFETs with thin backgate dielectrics
- E.C. Jones
- M. Ieong
- et al.
- 2001
- DRC 2001
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3 results for T. Furukawa
A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP)
- B. Davari
- C. Koburger
- et al.
- 1989
- IEDM 1989
Variable-size shallow trench isolation (STI) technology with diffused sidewall doping for submicron CMOS
- B. Davari
- C. Koburger
- et al.
- 1988
- IEDM 1988