A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
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18 results for Bassem Hamieh
Defect detection strategies and process partitioning for SE EUV patterning
- Luciana Meli
- Karen Petrillo
- et al.
- 2018
- SPIE Advanced Lithography 2018
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Single-expose patterning development for EUV lithography
- Anuja De Silva
- Karen Petrillo
- et al.
- 2017
- SPIE Advanced Lithography 2017
Reaching for the true overlay in advanced nodes
- Chiew-Seng Koay
- Bassem Hamieh
- et al.
- 2017
- SPIE Advanced Lithography 2017
BEOL process integration for the 7 nm technology node
- T. Standaert
- Genevieve Beique
- et al.
- 2016
- IITC/AMC 2016
EUV patterning successes and frontiers
- Nelson Felix
- Daniel Corliss
- et al.
- 2016
- SPIE Advanced Lithography 2016
Assessments of image-based and scatterometry-based overlay targets
- Chiew-Seng Koay
- Nelson Felix
- et al.
- 2016
- SPIE Advanced Lithography 2016
Trench and hole patterning with EUV resists using dual frequency capacitively coupled plasma (CCP)
- Yannick Feurprier
- Katie Lutker-Lee
- et al.
- 2015
- SPIE Advanced Lithography 2015
Plasma etch challenges with new EUV lithography material introduction for patterning for MOL and BEOL
- Changwoo Lee
- Bhaskar Nagabhirava
- et al.
- 2015
- SPIE Advanced Lithography 2015