Design of projected phase-change memory mushroom cells for low-resistance drift
- Timothy M. Philip
- Kevin W. Brew
- et al.
- 2022
- MRS Bulletin
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14 results for Richard Conti
Improved Air Spacer Co-Integrated with Self-Aligned Contact (SAC) and Contact over Active Gate (COAG) for Highly Scaled CMOS Technology
- Kangguo Cheng
- Chanro Park
- et al.
- 2020
- VLSI Technology 2020
Energy Considerations in the Deposition of High-Quality Plasma-Enhanced CVD Silicon Dioxide
- E. Tierney
- J. Batey
- et al.
- 2019
- JES
Gate-Cut-Last in RMG to Enable Gate Extension Scaling and Parasitic Capacitance Reduction
- A. Greene
- Huimei Zhou
- et al.
- 2019
- VLSI Technology 2019
Self-Allancd Gate Contact (SAGC) for CMOS technology scaling beyond 7nm
- Ruilong Xie
- Chanro Park
- et al.
- 2019
- VLSI Technology 2019
Novel Materials and Processes in Replacement Metal Gate for Advanced CMOS Technology
- Ruqiang Bao
- Steven Hung
- et al.
- 2018
- IEDM 2018
Advanced Arsenic Doped Epitaxial Growth for Source Drain Extension Formation in Scaled FinFET Devices
- Shogo Mochizuki
- B. Colombeau
- et al.
- 2018
- IEDM 2018
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
Atomic layer deposition of sidewall spacers: Process, equipment and integration challenges in state-of-the-art logic technologies
- Michael Belyansky
- Richard Conti
- et al.
- 2014
- ECS Meeting 2014
Study of silicon strain in shallow trench isolation
- M. Belyansky
- N. Klymko
- et al.
- 2010
- Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films